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So let's say DIR is tied to GND (so B->A), Vcc(A) is at 3V3, and Vcc(B) along with the B inputs are all disconnected (they could form part of an input cable connector). Thus all the B inputs are floating. In this case all the ports should be high impedence and there should be no issues with floating. Is this correct?
I ask because the TI versions of this chip's datasheet say the inputs are always active and can't be allowed to float. Which is why I'm using the NXP versions!